POSTER: Hardening Selective Protection across Multiple Program Inputs for HPC Applications
With the ever-shrinking size of transistors and increasing scale of applications, silent data corruptions (SDCs) have become a common yet serious issue in HPC applications. Selective instruction duplication (SID) is a popular fault-tolerance technique that can obtain a high SDC coverage with low-performance overhead, as it selects the most vulnerable parts of a program for protection with priority. However, existing studies of SID are confined to single program input in the evaluation, assuming that the error resilience of the program remains similar across inputs. Nevertheless, we observe that the assumption does not always hold in practice, leading to a drastic loss of the SDC coverage from SID when the protected program runs with different inputs, which seriously compromises the reliability of HPC applications. We notice that the SDC coverage loss often correlates with a small set of instructions — we call them incubative instructions, which reveal elusive error propagation characteristics across multiple inputs. Hence, we proposed Sentinel, an automated compiler-based framework that combines static program analysis and dynamic fuzzing techniques to distinguish incubative instructions for a given program and optimizes SID by reprioritizing the identified incubative instructions. Evaluation results show that Sentinel can effectively mitigate the loss of SDC coverage (up to 97.00%) across multiple inputs, which significantly hardens existing SID techniques.
Tue 5 AprDisplayed time zone: Eastern Time (US & Canada) change
14:00 - 15:25 | |||
14:00 5mTalk | POSTER: Automatic Synthesis of Parallel Unix Commands and Pipelines with KumQuat Main Conference Jiasi Shen Massachusetts Institute of Technology, Martin C. Rinard Massachusetts Institute of Technology, Nikos Vasilakis Massachusetts Institute of Technology | ||
14:05 5mTalk | POSTER: Towards OmpSs-2 and OpenACC Interoperation Main Conference Orestis Korakitis Barcelona Supercomputing Center (BSC), Simon Garcia De Gonzalo Barcelona Supercomputing Center (BSC), Nicolas Guidotti INESC-ID, Instituto Superior Técnico, University of Lisbon, João Barreto INESC-ID, José C. Monteiro INESC-ID, Instituto Superior Técnico, University of Lisbon, Antonio J. Peña Barcelona Supercomputing Center (BSC) | ||
14:10 5mTalk | POSTER: LB-HM: Load Balance-Aware Data Placement on Heterogeneous Memory for Task-Parallel HPC Applications Main Conference | ||
14:15 5mTalk | POSTER: Hardening Selective Protection across Multiple Program Inputs for HPC Applications Main Conference Yafan Huang University of Iowa, Shengjian Guo Baidu USA, Sheng Di Argonne National Laboratory, Guanpeng Li University of Iowa, Franck Cappello Argonne National Laboratory | ||
14:20 5mTalk | POSTER: A Parallel Branch-and-Bound Algorithm with History-Based Domination Main Conference Taspon Gonggiatgul California State University, Sacramento, Ghassan Shobaki California State University, Sacramento, Pınar Muyan-Özçelik California State University, Sacramento | ||
14:25 5mTalk | POSTER: Remote OpenMP Offloading Main Conference | ||
14:30 5mTalk | POSTER: High Performance GPU Concurrent B+tree Main Conference Weihua Zhang Fudan University, Chuanlei Zhao Fudan University, Lu Peng Louisiana State University, Yuzhe Lin Fudan University, Fengzhe Zhang Fudan University, Jinhu Jiang Fudan University | ||
14:35 5mTalk | POSTER: The Problem-Based Benchmark Suite (PBBS), V2 Main Conference Daniel Anderson Carnegie Mellon University, Guy E. Blelloch Carnegie Mellon University, USA, Laxman Dhulipala University of Maryland, College Park, Magdalen Dobson Carnegie Mellon University, Yihan Sun University of California, Riverside | ||
14:40 5mTalk | POSTER: An LLVM-based Open-Source Compiler for NVIDIA GPUs Main Conference Da Yan Hong Kong University of Science and Technology, Wei Wang Hong Kong University of Science and Technology, Xiaowen Chu Data Science and Analytics Thrust, HKUST(GZ) | ||
14:45 5mTalk | POSTER: ParGeo: A Library for Parallel Computational Geometry Main Conference Yiqiu Wang Massachusetts Institute of Technology, Shangdi Yu Massachusetts Institute of Technology, Laxman Dhulipala University of Maryland, College Park, Yan Gu UC Riverside, Julian Shun MIT | ||
14:50 5mTalk | POSTER: Parallel Algorithms for Masked Sparse Matrix-Matrix Products Main Conference Srđan Milaković Rice University, Oguz Selvitopi Lawrence Berkeley National Laboratory, Israt Nisa AWS AI, Zoran Budimlić Rice University, Aydin Buluc Lawrence Berkeley National Laboratory | ||
14:55 5mTalk | POSTER: Rethinking Graph Data Placement for Graph Neural Network Training on Multiple GPUs Main Conference | ||
15:00 5mTalk | POSTER: Optimizing Consistency for Partially Replicated Data Stores Main Conference Ivan Kuraj MIT CSAIL, USA, Armando Solar-Lezama Massachusetts Institute of Technology, Nadia Polikarpova University of California at San Diego | ||
15:05 5mTalk | POSTER: Optimizing Sparse Computations Jointly Main Conference Kazem Cheshmi University of Toronto, Michelle Strout University of Arizona, Maryam Mehri Dehnavi University of Toronto | ||
15:10 5mTalk | POSTER: wCQ: A Fast Wait-Free Queue with Bounded Memory Usage Main Conference | ||
15:15 5mTalk | POSTER: Automatic Differentiation of Parallel Loops with Formal Methods Main Conference | ||
15:20 5mTalk | POSTER: A W-cycle Algorithm for Efficient Batched SVD on GPUs Main Conference Junmin Xiao Institute of Computing Technology of Chinese Academy of Sciences, Qing Xue Institute of Computing Technology, Chinese Academy of Sciences, Hui Ma Institute of Computing Technology, Chinese Academy of Sciences, Xiaoyang Zhang Institute of Computing Technology, Chinese Academy of Sciences, Guangming Tan Chinese Academy of Sciences(CAS) |